Semiconductor devices based on gallium nitride (GaN) technology offer significant advantages over silicon technology for power electronic systems. GaN and its alloys, such as aluminum gallium nitride (AlGaN), are direct, wide band gap semiconductor materials, which have applications for microelectronic devices, including diodes and transistors for microwave and power switching circuits, as well as optoelectronics.
For power devices, GaN offers high dielectric strength, high operating temperature, high current density, high speed switching and low on-resistance. Compared to silicon, GaN has ten times the electrical breakdown strength, three times the band gap, and exceptional carrier mobility. These properties enable transistors to be produced with a on-resistance lower than attainable with silicon technology, even better than a mechanical relay contact, and allows for diodes providing a near-zero forward voltage drop. These features, together with inherently negligible charge storage, permit the design of power switching circuits with higher efficiency, smaller size and lower heat losses.
For example, as disclosed in copending PCT International patent application no. PCT/CA2012/000080 entitled “Gallium nitride power devices using island topography” (and related applications, having common ownership and inventorship with this application), GaN transistors with ultra-low on-resistance can be produced using Island Topology™. This topology provides a compact structure with a gate width double that of a conventional multi-finger design of a similar device size, with superior current handling per unit area. A breakdown voltage exceeding 1200V can be achieved.
GaN power transistors for power conversion circuits for high voltage (HV) applications, e.g. 600/650V, are typically normally-on (depletion mode) transistors. These transistors are usually driven by a series connected, discrete, power MOSFET device, i.e. in a cascode configuration, to provide normally-off operation (see FIG. 1). Conventionally, the hybrid cascode arrangement is provided with a separate, high power, high speed driver circuit, having a separate isolated power supply.
This type of hybrid cascode arrangement can provide a positive threshold voltage and further enhancement of the high Figure of Merit (FOM) of a high voltage GaN transistor. However, issues caused by transient voltages and heat dissipation can detract from performance and these issues also create challenges for the design of the driver circuit. The overall performance of hybrid cascode arrangements using existing driver circuits falls short of the potential capabilities of an individual GaN transistor.
The GaN transistor may be required, for example, to provide <20 ns switching time and more than 30 A current switching capability. Any significant series inductance at the MOSFET source or at the common node will provide unwanted L di/dt transients which can be as large as the threshold voltage of the devices, thus causing unwanted switching. It will be appreciated that in operation of an electronic power switching system that is capable of switching, for example, 30 Amps at 1000V, i.e. 30,000 Watts, safe operation may be compromised by any unwanted switching caused by transients or noise that exceeds the threshold voltage of the device.
Additionally, series resistance in the source connection results in debiasing which produces an apparent increase in the on-resistance. Thus, in conventional systems, the driver MOSFET is typically a discrete, oversized driver MOSFET that is rated to withstand ten times the static voltage stress.
To implement the series cascode connection of the two transistors and achieve high speed with low losses, the GaN transistor and a discrete vertical MOSFET are co-packaged using multiple wire bonded connections. Wire bonding is expensive, area consuming, and cumbersome. Additionally, the wire bonded interconnects represent significant inductance that contributes to high frequency switching transients and unnecessary power loss, particularly for switching speeds in the order of 100V/ns.
To reduce the inductance of the connections between the GaN transistor and the MOSFET, the two transistors are physically arranged and packaged in close proximity, to reduce interconnect length. This arrangement then presents problems for thermal management.
GaN transistors that can switch, for example, 24 A (1200 V) and 47 A (650 V) may have die sizes as small as 2×2 mm Calculations show these die, when packaged, can have a thermal resistance of greater than 2° C./W. For example, it is estimated that, for an on-resistance of 80 mΩ, the ohmic power dissipation would be 32 Watts if the device were required to sink 20 Amps The thermal resistance in total for the combination of the device, package and heat sink could exceed 5° C./W, so that the temperature increase from the GaN device dissipation alone could exceed 150° C. The additional heat dissipation of the MOSFET, assuming a 20 mΩ device is used, would be 8 Watts. With the total structure dissipating 40 Watts, the temperature within the package could exceed the safe operating limits of the MOSFET, typically 175° C., if there is insufficient heat dissipation.
Thus, conventional cascode arrangements of a GaN power transistor and a discrete driver MOSFET require complex and costly driver circuitry to manage issues with transient voltages and packaging with significant thermal dissipation capability to maintain acceptable operating temperatures.
Improvements or alternative solutions are needed to address thermal management issues, to address issues with series inductance and resistance, reduce or manage unwanted noise and voltage transients, and enable lower cost and more compact systems and devices for electronic power conversion circuits, particularly those using hybrid cascode arrangements of a normally-on GaN power transistor and a driver MOSFET.
The present invention seeks to overcome, or mitigate, one or more of the above mentioned disadvantages or limitations of these known systems and devices for electronic power conversion circuits, or at least provide an alternative.